Schemotechnics and peculiarities of realisation of a large optoelectronic neuro-coprocessor on the base of highly efficient vector-matrix multiplier

Principles and general peculiarities of schemotechnical realisation of optoelectronic neuro-coprocessor for PC providing emulation of one layer of arbitrary neural network (with the number of neurons up to 1000 under their full coherence), are considered and described within the framework of vector-matrix multiplying. Different modifications of the highly efficient vector-matrix multiplier realisation are proposed. Developed system is able to recognise reliably images with high noise level within the period no more than three time constants of output photo-receiver.